ECE 411 : Computer Organization and Design
	| Home Page | Syllabus | Lectures | Laboratory | Web board | Grades | Announcements	Course Objectives This course is an intensive introduction to the fundamentals of computer architecture. Relying heavily upon the elementary principles taught in ECE 290 and ECE 390 (old ECE 291), we will discuss the basic design, or architecture, of computing hardware. Computer systems involve architecture design at many levels. We will focus on the instruction set architecture (ISA) level (the interface between the software and computing hardware) and the microarchitecture level (the computing hardware itself). We will examine to some extent, the level above the instruction set (the programming language level) and the level below the microarchitecture (the logic gate level) in order to deepen our understanding of computing systems. This course has a demanding design component; you will implement some of the basic concepts presented in lecture using real hardware design tools. Contact Information Instructor: Rakesh Kumar. Office: 208 CSL, E-mail: rakeshk-at-uiuc.edu. Teaching Assistants: Matt Hansen (mwhansen-at-uiuc.edu) Doug Johnson (drjohnso-at-uiuc.edu) Matt Lucas (mmlucas2-at-uiuc.edu) Dan Manjarres (manjarrs-at-uiuc.edu) John Sartori(sartori2-atuiuc.edu)[Non-MP issues] Lecture and Office Hours Lecture: 3:00-4:20PM, Mon Wed, 165 EL. Instructor office hours: 12:15-1:15PM Mon, Zas Cafe. Course TA office hours: 252EL (EWS). Monday: 4:30-6:00pm (Doug) Tuesday: 12:00-2:30pm (Matt H.), 2:30-4:00pm (Dan), 6:00-9:00pm (Matt L.) Wednesday: 1:30-3:00pm (Doug), 4:30-6:30pm (Dan) Thursday: 12:00-2:30pm (Matt H.), 2:30-4:00pm (Dan) The TAs will be sitting at a workstation with a sign on his computer. Check the webboard for extra office hours and temporary changes. Course Essentials Prerequisites: ECE 290 (or equivalent) and ECE 291 (new ECE 390, or equivalent). Text: John Hennessy, David Patterson, Computer Organization and Design:: The Hardware/Software Interface, 3^rd Edition, Morgan Kaufmann Other useful books include: Harold S. Stone, High-Performance Computer Architecture, 3^rd edition, Addison Wesley Andrew Tanenbaum, Structured Computer Organization, 4^th Edition, Prentice Hall, 1999 Also, students in the past have found the following book helpful in doing the projects. P. J. Ashenden, The Student’s Guide to VHDL, Morgan Kaufmann, 1996 . Grading policy: Projects: 3% MP1 13% MP2 25% MP3 Exams: 16% Midterm #1 16% Midterm #2 25% Final Other: 2% Subjective evaluation Regrade policy Integrity policy Late submission policy Late submissions will be subject to the following penalty schedule without exceptions: 15% off for the first day, 10% off for each subsequent day, excluding weekends. No credit will be given to any submissions that are more than 7 days past the due date. Exam times and locations: 1st Midterm – Feb 27 (7:00-10:00PM), 165 EL 2nd Midterm – April 7 (7:00-10:00PM), 165 EL Final - May 2 (1:30-4:30PM), 165 EL If you have a conflict, please let me know immediately. These exams have priority over any other commitments that might come up at a later date.
		“If the automobile had followed the same development as the computer, a Rolls-Royce would today cost $100, get a million miles per gallon, and explode once a year killing everyone inside.” "Where a calculator on the ENIAC is equipped with 18 000 vacuum tubes and weighs 30 tons, computers of the future may have only 1 000 vacuum tubes and perhaps weigh 1½ tons." — Popular Mechanics, March 1949