ECE543
Digital System Testing
and Design for Testability
Department of
Electrical and Computer Engineering
Spring 2007
Instructor:
Professor Janak H. Patel
Office:
250 CSL, Phone 3-6201
Research Home Page: IGATE
Office Hours: 10:00am to 12:00pm Tuesdays in 250 CSL
Teaching Assistant: none
Lectures:
Prerequisites: Logic Design, Switching Theory, and
Course
Description:
This course
teaches fundamentals of testing theory and practice for complex VLSI designs.
The objectives are to give the student the ability to solve a wide range of
non-trivial testing problems using practical and cost effective
techniques. Students will also learn to create test automation tools on
their own. Topics covered include, Fault Modeling, Fault Simulation,
Automatic Test Generation in Combinational and Sequential Circuits, Functional
Testing of Microprocessors, ALUs and Memories, Design
for Testability, Synthesis for Testability, Built-In Self-Test and Diagnosis.
Required Text: Essentials
of Electronic Testing, Michael L. Bushnell and Vishwani D. Agrawal, Springer
Publishers
References: 1. Testing
of Digital Systems, Niraj Jha
and Sandeep Gupta, Cambridge University Press
2. Digital System Testing and
Testable Design, Abramovici, Breuer
and Friedman, IEEE Press
Course Outline: Topics and Chapters
Grading:
Homework (20 per cent)
One Machine Problem (10 per cent)
One Term Project (25 per cent)
One Midterm (20 per cent)
Final Exam (25 per cent)