ECE 598 NS: Machine Learning in Silicon

Course Description

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  • Description: This course will introduce the design and implementation of machine learning systems on resource-constrained platforms that are beginning to find use in emerging sensor-rich applications such as wearables, IoTs, autonomous vehicles, and biomedical devices. The course will begin with preliminaries including motivation and scope of the course; terminology, applications and platforms; taxonomy of inference tasks and learning. Algorithm, architecture and circuit trade-offs to meet desired system performance metrics such as accuracy, latency, throughput, will be studied under severe constraints on precision, memory, computation, and energy. The least mean squared (LMS) algorithm will be employed as a vehicle to understand the issues involved in mapping learning algorithms to architectures and circuits including – algorithmic properties (training, convergence); analytical estimation of bit precision requirements; use of data flow-graph (DFG) descriptors; algorithm-to-architecture mapping using DFG transforms; architectural energy and delay estimation via CMOS circuit models of arithmetic units, memory and interconnect; and case studies of CMOS prototypes of LMS. This path from algorithms-to-architectures-to-circuits will be taken for: single stage classifiers (support vector machine, decision trees), classifier ensembles (random forest, ADAboost), and deep neural networks (DNNs/CNNs). Finally, machine learning on silicon operating at limits of energy efficiency will be studied – properties of low-SNR/low-energy nanoscale fabrics; intrinsic error tolerance of machine learning algorithms; error-resilient computing; inexact computing; Shannon-inspired computing (statistical error compensation (SEC)); and case studies of CMOS implementations. Advanced topics include: emerging cognitive applications; deep in-memory architecture (DIMA); systems on beyond CMOS fabrics. 

  • Syllabus and schedule; Reading List

  • Prerequisite: ECE482 or equivalent. Students should be familiar with programming in MATLAB. HDL (VHDL/Verilog) programming experience is desirable.

  • Time and Place: 11:00am-12:20pm, MW, 2074 ECE Building

Instructor

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Professor Naresh Shanbhag

Department of Electrical and Computer Engineering

Web page: http://shanbhag.ece.illinois.edu/

Office Hours: Wednesdays:  2pm-3pm, 414 CSL

Email: shanbhag@illinois.edu

   
   

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Announcement

Contact

414 Coordinated Science Laboratory
University of Illinois at Urbana-Champaign
1308 West Main Street, Urbana, IL 61801-2307, USA
Tel:(217) 244-0041
Fax:(217) 300-3600